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HD74AC273
Octal D Flip-Flop
Description
The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flops's Q output All outputs will be forced Low independently of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
Features
* * * * * * * Ideal Buffer for MOS Microprocessor or Memory Eight Edge-Triggered D Flip-Flops Buffered Common Clock Buffered, Asynchronous Master Reset See HD74AC373 for Transparent Latch Version See HD74AC374 for 3-State Version Outputs Source/Sink 24 mA
HD74AC273
Pin Arrangement
MR 1 Q0 2 D0 3 D1 4 Q1 5 Q2 6 D2 7 D3 8 Q3 9 Gnd 10 (Top view)
20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 CP
Logic Symbol
D0 D1 D2 D3 D4 D5 D6 D7 CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Pin Names
D0 - D7 MR CP Q0 - Q7 Data Inputs Master Reset Clock Pulse Input Data Outputs
2
HD74AC273
Logic Diagram
D0 CP D1 D2 D3 D4 D5 D6 D7
D CP RD MR
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Mode Select-Truth Table
Inputs Operating Mode Reset (Clear) Load "1" Load "0" H: L: X: : MR L H H CP X Dn X H L Outputs Qn L H L
High Voltage Level Low Voltage Level Immaterial Low-to-High Clock Transition
DC Characteristics (unless otherwise specified)
Item Maximum quiescent supply current Maximum quiescent supply current Symbol I CC I CC Max 80 8.0 Unit A A Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25C
3
HD74AC273
AC Characteristics: HD74AC273
Ta = +25C CL = 50 pF Item Maximum clock frequency Propagation delay Clock to output Propagation delay Clock to output Propagation delay MR to output Note: t PHL t PHL t PLH Symbol f max VCC (V)*1 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Min 90 140 1.0 1.0 1.0 1.0 1.0 1.0 Typ 125 175 7.0 5.5 7.0 5.0 7.0 5.0 Max -- -- 12.5 9.0 13.0 10.0 13.0 10.0 Ta = -40C to +85C CL = 50 pF Min 75 125 1.0 1.0 1.0 1.0 1.0 1.0 Max -- -- 14.0 10.0 14.5 11.0 14.0 10.5 ns ns ns Unit MHz
1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V
AC Operating Requirements: HD74AC273
Ta = +25C CL = 50 pF Item Setup time, HIGH or LOW Data to CP Hold time, HIGH or LOW Data to CP Clock pulse width HIGH or LOW MR Pulse width HIGH or LOW Recovery time MR to CP Note: t rec tw tw th Symbol t su VCC (V)*1 Typ 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.5 2.5 -2.0 -1.0 3.5 2.5 2.0 1.5 1.5 1.0 Ta = -40C to +85C CL = 50 pF Guaranteed Minimum 5.5 4.0 0.0 1.0 5.5 4.0 5.5 4.0 3.5 2.0 6.0 4.5 0.0 1.0 6.0 4.5 6.0 4.5 4.5 3.0 ns ns ns ns Unit ns
1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V
4
HD74AC273
Capacitance
Item Input capacitance Power dissipation capacitance Symbol CIN CPD Typ 4.5 50.0 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V
5
Unit: mm
24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89
1.27 Max
10 1.30 2.54 Min 5.08 Max 7.62
0.51 Min
2.54 0.25
0.48 0.10
0.25 - 0.05 0 - 15
+ 0.11
Hitachi Code JEDEC EIAJ Weight (reference value)
DP-20N -- Conforms 1.26 g
Unit: mm
12.6 13 Max
20
11
1
10
5.5
0.80 Max
2.20 Max
*0.22 0.05 0.20 0.04
0.20 7.80 + 0.30 -
1.15
0 - 8
0.70 0.20
1.27 *0.42 0.08 0.40 0.06
0.12 M
*Dimension including the plating thickness Base material dimension
0.10 0.10
0.15
Hitachi Code JEDEC EIAJ Weight (reference value)
FP-20DA -- Conforms 0.31 g
Unit: mm
12.8 13.2 Max 20 11 7.50 1 0.935 Max 10
2.65 Max
*0.27 0.05 0.25 0.04
0.25 10.40 + 0.40 -
1.45
0.20 0.10
0 - 8
0.57 0.70 + 0.30 -
1.27
*0.42 0.08 0.40 0.06
0.15 0.12 M
Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DB Conforms -- 0.52 g
*Dimension including the plating thickness Base material dimension
Unit: mm
6.50 6.80 Max 20 11 4.40 1 10 0.65 0.20 0.06 *0.22+0.08 -0.07 0.13 M 0.65 Max *0.17 0.05 0.15 0.04 1.10 Max 0.07 +0.03 -0.04 0 - 8 0.50 0.10 1.0 6.40 0.20 0.10
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
TTP-20DA -- -- 0.07 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.

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